“Our mission is to help you solve your problem in a way that is super cost-effective and available to as many people as possible.”

Listen to Tenstorrent CEO Jim Keller discuss why AI models are graphs and how we built our software and hardware to give you…

MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23) - enyac-group/MaxEVA

One of the collaborators in the AutoGen project, shares insights about its vision, architecture and the future of autonomous agents.

The RISC-V Processor Design Course is officially live! 🚀

After months of dedicated effort, late-night bug fixes on the Yet Another RISC-V Processor (YARP) core, and recording sessions, I'm thrilled to announce the release of my RISC-V Processor Design course…

The new TPU v5p is a core element of AI Hypercomputer, which is tuned, managed, and orchestrated specifically for gen AI training and serving.

Very proud that the team has just pushed out the algorithmic investigation into FP6 and its new quantization strategy for LLMs that tackles the quality challenges from the INT4 solutions. Very soon, my team will release an ultra fast FP6 kernel design on…

Current soft processor architectures for FPGAs do not utilize the potential of the massive parallelism available. FPGAs now support many thousands of embedded floating point operators, and have...

I designed my own 16-Bit Computer in Microsoft Excel without using Visual Basic noscripts, plugins, or anything other than plain Excel. This system on a spreadsheet is based off of a custom Instruction Set Architecture that has a total of 23 instruction mnemonics…

Quick and dirty method to implement a vectorized non-linear function using RVV

Today we embark on an exciting journey as we transition to Altera, an Intel Company. In a world of endless opportunities and challenges, we are here to provide the flexibility needed by our ecosystem of customers and partners to pioneer and accelerate innovation.…

Grayskull-powered DevKits are available to two versions - e75 and e150

FPGAs are increasingly prevalent in cloud deployments, serving as Smart NICs or network-attached accelerators. Despite their potential, developing distributed FPGA-accelerated applications remains...

We are sharing details of our next generation chip in our Meta Training and Inference Accelerator (MTIA) family. MTIA is a long-term bet to provide the most efficient architecture for Meta’s unique workloads.