We are sharing details of our next generation chip in our Meta Training and Inference Accelerator (MTIA) family. MTIA is a long-term bet to provide the most efficient architecture for Meta’s unique workloads.

We explore the floating-point arithmetic implemented in the NVIDIA tensor cores, which are hardware accelerators for mixed-precision matrix multiplication available on the Volta, Turing, and Ampere microarchitectures. Using Volta V100, Turing T4, and ...

The new sixth-generation Trillium Tensor Processing Unit (TPU) makes it possible to train and serve the next generation of AI foundation models.

A visualisation of number formats for machine learning --- I couldn’t find any good visualisations of machine learning number formats online, so I decided to make one. It’s interactive, and hopefully gives a sense of the trade-offs between using different…

Tenstorrent has unveiled its next-generation Wormhole processor for AI workloads that promises to offer decent performance at a low price. The company currently offers two add-on PCIe cards carrying one or two Wormhole processors as well as TT-LoudBox, and…

As a digital design student, have you ever wondered how the RTL code we write magically gets transformed into circuits?

Have you ever thought how those always blocks were synthesized into gates and LUTs, or even special blocks like BRAM and DSP blocks?
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【2024 ANDES RISC-V CON Silicon Valley】
DEEP DIVE INTO AUTOMOTIVE / AI / APPLICATION PROCESSORS AND SECURITY TRENDS
📍About The Event
Recently, RISC-V, with its open, streamlined, and scalable configuration, has become the mainstream solution adopted by leading…

Explore how Block Floating Point 16 (BFP16) with an effective 9-bit rate enhances Llama3 for up to 8x faster inference on FPGAs. Learn why BFP16 is a compelling alternative to FP8 for optimizing large language models without sacrificing accuracy.

Google was the first cloud provider to make its own custom AI chips, called TPUs, when they first came out in 2015 - a trend both Amazon and Microsoft followed years later. Now, Apple has revealed it uses TPUs to train its AI models, positioning Google chips…

In this talk from AI Infra @ Scale 2024, Joel Colburn, a software engineer at Meta, technical lead Junqiang Lan, and software engineer Jack Montgomery discuss the second generation of MTIA, Meta’s …

Large Language Models (LLMs) have emerged as powerful tools for natural language processing tasks, revolutionizing the field with their ability to understand and generate human-like text. In this...

An in depth look at Tenstorrent Wormhole, originally posted on corsix.org